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Brain-inspired Processing

Event-driven spiking neural networks with in-memory computing — neuromorphic chips and systems that far outpace GPU efficiency on matching tasks.

LYRA-β Max BIM204 Brain-Inspired Chip
LYRA™

LYRA-β Max Brain-Inspired Chip BIM204

Built on the second-generation Tianqinxin processing core (BPU-II), chiplet interconnects scale spiking-neuron compute to 4.6 million with ~2.7× simulation speed over the previous generation, supporting on-chip brain-inspired model training.

460万
neurons
2.7×
sim speed
BPU-II
core
chiplet
interconnect
10×
vs A100
10⁹
Neurons
~100×
Efficiency gain
§ 000Scroll
§ 001Definition

Not another
GPU. It's a brain.

BPU (Brain Processing Unit) refers to spike/event-driven neuromorphic computing chips and systems. Its core goal is to provide native hardware support for SNN neuron updates, synaptic event propagation, and event routing/scheduling — constructing scalable brain-inspired computing systems through asynchronous AER (Address-Event Representation) communication.

TrueNorth, Loihi, and more recent wafer-scale neuromorphic systems are all representatives of this class. On tasks matching its paradigm — event streams, sparse temporal signals, online learning — BPU far outpaces traditional GPU efficiency.

Event-driven

Compute only on actual spikes

Sparse activation

Skip invalid dense MAC sweeps

In-memory computing

Moving data costs more than computing

§ 002Comparison

BPU vs GPU:
not a replacement, complement.

If "computing efficiency" means effective task volume per unit power, BPU typically significantly outperforms GPU on tasks matching its paradigm.

Aspect
BPU
GPU
Computing paradigm
Event-driven, sparse activation
Dense parallel, tensor operations
Energy efficiency
Significant advantage in sparse scenarios
High efficiency in dense computing
Suitable tasks
Event streams, sparse temporal signals
Dense tensors, matrix operations
Communication
Asynchronous AER, on-demand
Global sync, batch transfer
Latency profile
Ultra-low latency, real-time response
Batch mode, queuing latency

Efficiency depends on whether the task can be expressed as a sparse event-driven SNN and efficiently mapped to BPU neuron/synapse models.

§ 003Product Line

Three forms,
one brain.

From PCIe accelerator card to wafer-scale server — choose the right BPU form factor for your task scale.

01
Entry

BPU PCI Compute Card

Single or few BPU chips packaged as cards / development platforms, connected via PCIe to host. Easy integration into existing server workflows with low barriers.

  • PCIe interface, easy integration
  • Low development barrier
  • Suitable for prototyping
02
Mid-tier

BPU Wafer Computing Module

BPU chiplet modular packaging, flexibly integrable into various computing platforms for higher-density brain-inspired compute.

  • Modular design
  • Flexible integration
  • High-density computing
  • 400M+ neuron simulation
03
FlagshipFlagship

Tianqin Xinhai · Wafer Server

Wafer-scale neuromorphic system with on-wafer short-distance high-density interconnects. Significant advantages in large-scale event communication and energy efficiency.

  • Billion-scale neurons
  • Trillion-scale synapses
  • 10x+ vs NVIDIA A100
  • Near-biological efficiency
How to choose

PCIe version

Prototyping, small-scale apps. Easy workflow integration.

Module version

Mid-scale apps. Flexible integration, customizable.

Wafer-scale

Ultra-large brain simulation. Billion-neuron scale, near-biological efficiency.

Flagship
§ 004Deep dive

Tianqin
Xinhai.

A breakthrough wafer-scale neuromorphic computing system — interconnected on a single wafer into a unified event-driven compute network.

What is wafer-scale computing?

Wafer-scale BPU computing interconnects numerous brain-inspired chips (or chiplets) on a single wafer into a unified event-driven system. Computation remains fundamentally SNN neuron state updates and synaptic event propagation — but scaled to "wafer-level neuron-synapse totals." Events transmit at high speed via asynchronous AER, with hierarchical timesteps or GALS synchronization ensuring temporal consistency across chiplets.

Performance breakthrough

10⁹
neurons
Scale
10×+
vs A100
~100×
Efficiency
< 1ms
Event latency
01

High-density interconnect

On-wafer short-distance high-density interconnects replace PCB-level long connections, significantly reducing bandwidth, latency and power penalties.

02

Ultra-high efficiency

Brings large-scale SNN and brain simulations closer to biological system efficiency in power-latency metrics.

03

Event-driven architecture

Events transmitted at high speed via asynchronous AER, with GALS synchronization ensuring temporal consistency.

04

Brain-scale simulation

Supports near-brain-scale parallel spiking computation with billion-neuron parallel processing.

§ 005Use Cases

An event-
driven world.

BPU is best suited for scenarios where inputs are naturally event streams or sparsifiable, and decisions depend heavily on temporal structure.

01

Brain simulation research

Large-scale neuroscience circuit simulation with billion-neuron parallel processing.

02

DVS event camera

Event-based visual perception processing with ultra-low latency real-time response.

03

Low-power edge AI

Ultra-low latency real-time control and online learning for IoT and embedded scenarios.

04

Spiking sensor fusion

Radar / sonar / tactile sensor integration with unified multi-modal event stream processing.

Common thread: strong requirements for low latency, low power, sparse temporal processing, or online plasticity.

§ 006Hardware
LYRA™

From card,
to server.

Second-generation BPU-II brain-inspired chip

Neogenint LYRA-β Max Brain-Inspired Chip BIM204

LYRA-β Max (BIM204) is a brain-inspired chip using the second-generation Tianqinxin processing core (BPU-II). Based on chiplet interconnect technology, it expands spiking-neuron compute scale to 4.6 million, improves simulation speed by about 2.7x versus the previous generation, and supports on-chip brain-inspired model training.

  • Uses the second-generation Tianqinxin processing core (BPU-II)
  • Based on chiplet interconnect technology
  • 4.6 million spiking-neuron compute scale
  • About 2.7x faster simulation speed versus the previous generation
  • Supports on-chip brain-inspired model training
  • Suitable for sparse unstructured data processing
  • Applicable to large-scale brain simulation, graph-network analysis, and industrial simulation solving

4.6M neurons · BPU-II · chiplet · 2.7x simulation speed

Inquire about this product
LYRA-β Max BIM204 Brain-Inspired Chip
LYRA-β / LBM212 Brain-Inspired Computing Card

Neogenint LYRA-β / LBM212 Brain-Inspired Computing Card

The LYRA-β / LBM212 brain-inspired computing card supports BI-Link interconnect expansion, up to 26 million simulated neurons, variable precision (FP32/FP16/INT8), and the LYRArc-II memory-computing fusion processing architecture.

  • LYRArc-II memory-computing fusion processing architecture
  • Supports BI-Link brain-inspired computing card interconnect expansion
  • Supports up to 26 million neuron simulation computing
  • Supports variable computing precision (FP32/FP16/INT8)
  • Supports full-range neuron connections
  • Supports event-driven computing and sparse computing
  • Supports microcode-level instruction reconfiguration for brain-inspired computing
  • Supports brain-inspired neural network training and inference
  • Suitable for large-scale brain simulation, graph-network analysis, and industrial simulation solving

Supports up to 26 million simulated neurons

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LBM212 Brain-Inspired Computing Acceleration Card
Brain-Inspired Wafer Computing Subsystem Module LBW2216

Neogenint Brain-Inspired Wafer Computing Subsystem Module LBW2216

Tianqin LBW2216 brain-inspired wafer computing subsystem is based on Neogenint's self-developed LYRArc-II linearly scalable processing architecture and a new integrated assembly technology covering compute, power supply, cooling, and interconnect. It is compatible with general server barebones, supports 400M+ spiking-neuron compute, and continues to refresh brain-inspired compute-scale records.

  • Self-developed LYRArc-II linearly scalable processing architecture
  • Integrated assembly technology for compute, power supply, cooling, and interconnect
  • Compatible with general server barebones
  • Supports 400M+ spiking-neuron compute scale
  • Continues to refresh brain-inspired compute-scale records
  • Supports on-chip brain-inspired model training
  • Supports direct expansion between subsystems
  • Suitable for sparse unstructured data processing
  • Applicable to large-scale brain simulation, graph-network analysis, and industrial simulation solving

Supports over 400 million neuron simulation computing

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LBW2216 Wafer Computing Subsystem Module
High-Density Brain-Inspired Computing Server BPSC-II

Neogenint High-Density Brain-Inspired Computing Server BPSC-II

BPSC-II is a high-density brain-inspired computing server integrating Neogenint's ultra-high compute-density system design, brain-inspired vascular phase-change liquid cooling, and fanless high-power GaN power supply. Its 4U chassis integrates 16 LBM212 computing cards and connects 48 LYRA-β Max brain-inspired chips for distributed computing.

  • 16 LBM212 brain-inspired computing cards in a 4U chassis
  • 48 interconnected LYRA-β Max brain-inspired chips in one system
  • Supports 400M+ spiking-neuron simulation compute
  • Used to build a 10B-neuron brain-inspired supercomputing system
  • Self-developed ultra-high compute-density system integration
  • Self-developed brain-inspired vascular phase-change liquid cooling technology
  • Fanless high-power GaN power supply
  • Supports BI-Link brain-inspired computing card interconnect
  • Supports variable computing precision (FP32/FP16/INT8)
  • Supports event-driven computing and sparse computing
  • Supports full-range neuron connections
  • Supports microcode-level instruction reconfiguration for brain-inspired computing
  • Supports brain-inspired neural network training and inference

4U · 16 LBM212 cards · 48 LYRA-β Max chips · 400M+ spiking neurons

Inquire about this product
BPSC-II High-Density Brain-Inspired Computing Server
§ 007Inquiry

Get a
quote.

BPU neuromorphic processors come in multiple form factors. Tell us your needs and we'll provide a custom solution within 24 hours.

What we need

  • Target application (edge inference / data center / scientific computing)
  • Preferred hardware form factor (LBM212 / LBW2216 / BPSC-II)
  • Expected order volume and delivery timeline
  • Whether software stack (Flint SDK) support is needed
§ 007What's next

Want to solve
real problems with neuromorphic computing?

Shanghai, ChinaNEOGENINT · BPU · 2026